IOTA Crypto Core FPGA — 5th Progress Report

The full article was originally published by MicroEngineer on Medium. Read the full article here.

Architecture Update

Since the EDF proposal (back in December) the architecture changed a lot and has been extended.

For instance, it wasn’t planned to support full Linux or to have USB. But since the controller was swapped to a more secure one the technical specs changed — Faster, more RAM, more periphery.

The main task of milestone 4 was the development of a SoM which can be used for high-level applications. Also the SoM should directly work with the FPGA module from milestone 3.

Originally, the Application Controller was supposed to be something simpler for bare-metal* applications but was swapped to a more potent controller which has more and better security features. Additionally, it is faster, has more RAM and can run full Linux. This gives a lot of advantages —e.g. you don’t have to care about device drivers for complex periphery like ethernet, USB or Bluetooth.

It might surprise that not only the SoM-block is marked green but also most of the Application which actually was scheduled for the 5th milestone.

The reason is quite simple — the SoM only has connectors on the bottom of the PCB so it can be plugged on a board. But how to test it without a board where it can be plugged on?

In order to avoid another test-board, I decided to move the PCB design of the Gateway into the 4th milestone and to extend it with additional interfaces.

bare metal*: applications run directly on the hardware without operating system like Linux

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